The present invention relates to electronic data transfer, and more particularly, to a method and system for transferring data over a bus from a host computer to an electronic device.
Various types of high speed expansion bus standards such as the peripheral component interconnect express (PCIe) bus standard and hardware compliant therewith have been used to transfer data from a system bus on a host computer such as a personal computer (PC) or server motherboard, hereinafter also referred to as a “host”, to another device not on the system bus, hereinafter also referred to as a “resource”, such as for example a circuit emulator. Such data transfer from a host to another device over an expansion bus may be called a “slave access”. The device may or may not reside directly on a board compliant with or supporting the PCIe bus standard, hereinafter also referred to as a PCIe board. However, it is understood the device may be in communication with the PCIe board via the PCIe board's local bus.
There are several ways to send data from a host to a PCIe board, among others these ways may be bus mode and direct memory access (DMA) mode. In bus mode, an address pointer running in software on the host may be remapped on the PCIe board's address space. Then, the data to be transferred may be sent directly from the PC memory to the PCIe board. Then, the PCIe board may write the data into the device or resource at the address corresponding to the offset of the pointer. Bus mode may have an advantage because the data transfer ends as soon as the software finishes copying and the PCIe board writes data immediately on the local bus, there is little if any latency delay. However, bus mode may have the disadvantage of low bandwidth because the accesses to the PCIe bus may be made only 32-bit word by 32-bit word by sending the address and the data in associated pairs for each data word to be sent. Thus, the ratio between the number of useful data words, N, and the total number of words sent is N/(2×N), which results in low bandwidth.
In DMA mode, a DMA controller either at the operating system level or from the PCIe board may be used. In this case, the software running on the host performs the following activities. First, the software copies the data to be transferred into a memory area readable by the PCIe board. Then the software may initialize the PCIe board DMA controller with; i) the address of the memory area where data will be read, ii) the address of the resource where the data will be written via the local bus, iii) the number of data words to write, and iv) the transfer start command. Then the software may poll a transfer completion flag to ensure that the data transfer is completed since the data transfer may be done in background operation. When the DMA controller receives the transfer start order, the DMA controller may; v) read the data in the memory of the host, vi) write data to the address specified by the software resource, and vii) update the transfer completion flag.
Because of the multitude of initializations that the software must do and the host memory the DMA controller must read, the DMA mode may be more complex and have increase latency between the notification to start data transfer and the start of data transfer than in bus mode. However, the DMA controller may read the data in the host memory block by block with only one address for N data words, hereinafter also referred to as a “burst”. The ratio between the number of useful data words transferred and the total number of words sent is N/(1+N). Thus, the bandwidth may be significantly better than in the bus mode particularly when a large number of words is sent.
Accordingly, there is a need to improve the speed of data transfer over a bus without the complexity and initialization latency of DMA mode and without the low bandwidth speed of bus mode while still preserving the high bandwidth speed of DMA mode and the low initialization latency of bus mode.